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HyperLynx Alliance Accelerates High-Speed Design-Ins and Verification - Mentor Graphics and Key Industry Partners Align Analysis Tools, Methodologies, Models, and Reference Designs - Mentor.com
HyperLynx Alliance Accelerates High-Speed Design-Ins and Verification

 

PRZOOM - /newswire/ - Santa Clara, CA, United States, 2015/01/27 - Mentor Graphics and Key Industry Partners Align Analysis Tools, Methodologies, Models, and Reference Designs - Mentor.com. NASDAQ: MENT

   
 
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HyperLynx Alliance Program Highlights

• HyperLynx® Alliance formed by Mentor Graphics and key industry partners provides free access to virtual reference designs plus tools, design data and identified best-practice methodologies for difficult SerDes and DDR design and verification challenges;
• Founding partners include Altera, PMC-Sierra, Samtec, Inc. and eASIC;
• New high-speed protocols are increasingly difficult to design and verify at multi-gigabit speeds The Alliance cloud platform provides quick access to targeted vendor reference designs, tools and models, allowing engineers to evaluate and tradeoff device parameters using recommended verification methodologies and sample channel designs;
• Virtual labs include the complete HyperLynx design environment, partner IBIS-AMI electrical models, a reference design for test cases, and a step-by-step instruction guide;
• Each HyperLynx virtual lab can be completed in a few hours and is available as a future resource for users during real design and implementation stages.

The no-cost HyperLynx Alliance virtual labs are available now online.

Mentor Graphics Corporation (NASDAQ: MENT) today announced its new HyperLynx® Alliance developed with key industry partners, integrating tools, data and methodology to accelerate new technology adoption. The alliance leverages the HyperLynx® tool suite for high-speed design and verification, deployed on cloud-based virtual labs to accelerate time to productivity. The virtual lab series leverages partner models and reference designs with the HyperLynx tool suite to demonstrate ideal design methodologies to address difficult high-speed printed circuit board (PCB) SerDes and DDR design challenges. The virtual labs reduce engineering time and costs associated with evaluation design tool requests and design case setup which could take days or weeks. The labs walk through a recommended design process, helping engineers formulate their own methodologies and enabling them to evaluate trade-offs to improve overall system performance.

Co-developed with industry vendors, the HyperLynx Alliance virtual labs include the complete HyperLynx design environment, partner IBIS-AMI and/or s-parameter electrical models, a reference design based test case, and a step-by-step instruction guide. Each virtual lab is free, available 24/7, and designed to be completed within a few hours. They remain available as a future resource for users during real design and implementation stages. Mentor Graphics is partnering with Altera Corp., PMC-Sierra, Inc., Samtec, Inc., and eASIC Corp. to develop labs.

The Altera HyperLynx Alliance virtual labs are available now, free of charge to registered users. Virtual Labs from PMC-Sierra, Samtec and eASIC will be available in early 2015. Users can access any virtual lab via an HTML5 compliant browser. For more information, visit the company website at: mentor.com/pcb/hyperlynx/hyperlynx-alliance

Commentary:

“We are pleased to be the only FPGA vendor that is part of the HyperLynx Alliance, which provides a great resource to design engineers by allowing them to exchange known-good high-speed design practices and methods,” stated Raj Patel, senior manager, midrange products, Altera Corporation. “These jointly developed virtual labs showcase a number of leading-edge technologies featured in Altera FPGAs and SoCs, like DDR3/DDR4 memory interfaces running up to 2666 Mbps and SerDes links operating up to 28 Gbps. The virtual labs will help the engineering community quickly gain the expert knowledge required to successfully complete their designs on-time and under budget.”

“The HyperLynx Alliance program will provide our customers with push-button and vetted IBIS-AMI simulations, allowing them to rapidly evaluate our SERDES against a variety of industry cables and connectors,” said Eric Clement, director of applications for the PMC-Sierra Enterprise Storage Division. “PMC is well known for our industry-leading SERDES, and this Virtual Lab is one more resource to ensure our customers have access to the most comprehensive design methods, tools and technologies.”

“Mentor Graphics and our partners are committed to share specific design approaches helping to educate the PCB design engineering community to remove problematic high-speed DDR and SerDes design bottlenecks,” stated A.J. Incorvaia, vice president and general manager of Mentor Graphics Board Systems Design Division. “Many of today’s design teams may be unprepared to meet today’s high-speed design issues due to limited experience, design know-how, and immediate access to the latest design software, IC and hardware technologies. The HyperLynx Alliance was created to serve the needs of today’s PCB design engineer with real-time access to tools, technologies and support to remove the uncertainty of today’s most daunting high-speed design issues.”

(Mentor Graphics, Mentor, and HyperLynx are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.)

About Mentor Graphics
Mentor Graphics Corporation (mentor.com) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the worlds most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year in excess of $1.15 billion. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777

 
 
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HyperLynx Alliance Accelerates High-Speed Design-Ins and Verification

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