PRZOOM - /newswire/ -
San Jose, CA, United States, 2014/06/02 - Atrenta, Inc. announced that MediaTek has adopted Atrenta's SpyGlass DFT (Design for Test) tool suite to enhance its semiconductor design and verification flow - Atrenta.com.
Atrenta, Inc., the leading provider of SoC Realization solutions for the semiconductor and consumer electronics industries, today announced that MediaTek has adopted Atrenta's SpyGlass DFT (Design for Test) tool suite to enhance its semiconductor design and verification flow. This addition has helped the team achieve stringent test coverage goals while meeting their challenging schedules.
“At Mediatek, we are committed to very high test coverage to ensure the highest possible quality products,” said Andrew Chang, Corporate Vice President at MediaTek. “By adding SpyGlass DFT to our workflow, we have seen increases in our test coverage while finding problems very early in our flow. This has allowed us to meet our test quality goals, aggressive schedules and customer demands.”
Previous workflows waited until after implementation to look at testability of the design. This caused an increase in time and difficulty, to find and fix the many types of problems that can occur, often back in the RTL (Register Transfer Level) description. Atrenta allows the designers to determine and address testability issues upfront, in the RTL, while it is more feasible and cost effective to do so.
SpyGlass DFT and SpyGlass DFT DSM tools provide an added boost to the capabilities in Mediatek's advanced design flow. It allows them to improve the testability of their designs at the beginning of the design flow for both stuck-at and transition fault analysis. The tool helps identify design rule violations and reports untestable faults, prior to implementation, allowing the team to make quick design changes while giving them more confidence in their RTL quality and project schedule.
“Atrenta prides itself in working with great electronics companies around the world, like Mediatek, and helping them find design problems early in the workflow, where it is easier and more cost effective to fix,” said Piyush Sancheti, vice president of marketing at Atrenta. “Our DFT technology is a key component of RTL Signoff and our entire SpyGlass platform is dedicated to this effort.”
About Atrenta, Inc.
Atrenta's SpyGlass Predictive Analyzer® (atrenta.com) significantly improves design efficiency for the world's leading semiconductor and consumer electronics companies. Patented solutions provide early design insight into the demanding performance, power and area requirements of the complex system on chips (SoCs) fueling today's consumer electronics revolution. More than two hundred fifty companies and thousands of design engineers worldwide rely on SpyGlass to reduce risk and cost before traditional EDA tools are deployed. And with the addition of BugScope™ verification efficiency is also enhanced, allowing engineers and managers to find the fastest and least expensive path to silicon for complex SoCs.
SpyGlass from Atrenta: Insight. Efficiency. Confidence.
Atrenta PR Agency: Liz Massingill - Lee PR
P: 650-363-0142 / E: liz[.]leepr.com.
© 2014 Atrenta Inc. All rights reserved. Atrenta, the Atrenta logo, SpyGlass, SpyGlass Predictive Analyzer, and Gensys are registered trademarks and BugScope is a trademark of Atrenta Inc. All others are the property of their respective holders.
This press release contains forward-looking statements. Atrenta disclaims any obligation and does not undertake to update or revise the forward-looking statements in this release.