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Mentor Graphics to Provide Tessent Silicon Test, Yield Analysis, Calibre Physical Verification and DFM for Freescale - Mentor Graphics Corp. announced that Freescale® Semiconductor has selected Mentor as an ideal partner in the silicon test, yield analysis, physical verification and DFM technology areas (NASDAQ: MENT) (NYSE: FSL, FSL.B) - Mentor.com
Mentor Graphics to Provide Tessent Silicon Test, Yield Analysis, Calibre Physical Verification and DFM for Freescale

 

PRZOOM - /newswire/ - Wilsonville, OR, United States, 2013/06/04 - Mentor Graphics Corp. announced that Freescale® Semiconductor has selected Mentor as an ideal partner in the silicon test, yield analysis, physical verification and DFM technology areas (NASDAQ: MENT) (NYSE: FSL, FSL.B) - Mentor.com. NASDAQ: MENT

   
 
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The collaboration enables Freescale’s deployment of the Mentor® Tessent® and Calibre® technologies covering design for test (DFT), physical verification and analysis, and pre- and post-tapeout design for fabrication and manufacturability (DFM). The new technologies expand on the work of an existing collaboration between Freescale and Mentor for developing design flows and methods to improve design for manufacturing and silicon test capabilities.

"Freescale requires a fast time-to-market. Therefore, we continue to invest significant resources to provide leading-edge capability throughout the design process," said Ken Hansen, vice president of the Technology Solutions Organization and chief technology officer for Freescale. "Mentor's platforms are an integral part of Freescale's design flow, helping us provide silicon solutions that have a high degree of testability, reliability and manufacturability. We chose Mentor Graphics because of its leadership in the DFT and physical verification technology areas. This alliance enables Freescale to expand product functionality and serve multiple markets, while reducing our development cycle time."

"As a close partner with Freescale, we continue to see the benefits of working together on our common goal of achieving higher product functionality and reliability with accelerated time to market," said Joseph Sawicki, vice president and general manager of the Design-to-Silicon Division at Mentor Graphics. “Our work together helps Mentor provide technologies to Freescale that increase the performance and scalability of their most advanced SoC designs.”

(Mentor Graphics Mentor, Tessent and Calibre are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.)

About Mentor Graphics

Mentor Graphics Corporation (mentor.com) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year of about $1,090 million. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.

 
 
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Mentor Graphics to Provide Tessent Silicon Test, Yield Analysis, Calibre Physical Verification and DFM for Freescale

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Contact: Sonia Harrison / Gene Forte - Mentor.com 
503-685-1165 / 503-685-1193 sonia_harrison[.]mentor.com / gene_forte[.]mentor.com
 
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IMPORTANT INFORMATION: Issuance, publication or distribution of this press release in certain jurisdictions could be subject to restrictions. The recipient of this press release is responsible for using this press release and the information herein in accordance with the applicable rules and regulations in the particular jurisdiction. This press release does not constitute an offer or an offering to acquire or subscribe for any Mentor Graphics Corporation securities in any jurisdiction including any other companies listed or named in this release.

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